1. Field of the Invention
The present invention relates to method and apparatus for data encoding and decoding and more particularly to method and apparatus for bandwidth compression employing partial response and run length limited coding.
It is well known and understood in the prior art that conventional NRZI recording uses a wide channel bandwidth where the bandwidth and signal shape are chosen such that there is no intersymbol interference at sample time.
Some time ago, Kobayashi and others suggested the use of a 1-D.sup.2 or class IV Partial Response Channel in magnetic recording. This has a narrower bandwidth in practical terms as much as a factor of two reduction in comparison to conventional NRZI recording.
The significant advantage of the 1-D.sup.2 channel is its half bandwidth which significantly reduces noise. A second advantage is that a Viterbi decoder can be used to further enhance detection over bit by bit detection. The Viterbi decoder is described in articles entitled "Error Bounds for Convolutional Codes and Asymtotically Optimum Decoding Algorithm", IEEE Transactions on Information Theory No. IT-13 Page 260, 1967, by A. J. Viterbi; and by T. K. Omura, "On the Viterbi Decoding Algorithm" IEEE Transactions on Information Theory Vol. IT-15, Pages 177-179, January 1969.
Inspection of the equalized read signal indicates that there is a problem deriving clocking information. This is because neither the signal peaks nor the signal zero crossings have a consistent time position relative to the bit cell. Sometimes they are at the center of the bit cell, with other patterns they are at the edge.
Prior art solutions to this clocking problem involve:
(a) Use of a double bandwidth channel for clocking; PA1 (b) Use of a pilot tone; and PA1 (c) Use of Viterbi decoder information in clocking.
At high densities, solution (a) introduces too much high frequency noise; solution (b) has been used in non-magnetic recording channels but is impractical in magnetic recording, and solution (c) while possible, involves a great deal more complexity than even the Viterbi decoder.
The solution to the clocking problem in accordance with the present invention which is applicable to magnetic recording with minimum complexity is to use a 1+D class I Partial Response Channel for clocking. Since the 1-D.sup.2 channel can be factored into a (1+D)(1-D) channel, the potential for sharing some of the 1-D.sup.2 equalization exists. In any case, the 1+D channel also has a bandwidth that is half the conventional bandwidth. In some applications, the 1+D channel could perhaps be used by itself. However, in magnetic recording applications a large amount of low frequency boost is required in the read equalizer to compensate for losses in the read process. Thus, low frequency noise will be enhanced in a 1+D channel. This is especially true if a magnetoresistive head is used because of low frequency thermal spikes generated at the read-head/media interface. Since the clock will average out noise errors, the noise problem is less severe for clocking compared with data detection. Thus, the solution according to the present invention is to use a 1-D.sup.2 channel for detection of data and a 1+D channel for clocking. This minimizes base line wander of the read signal used in detection and reduces the amount of low frequency boost required. This in turn reduces the low frequency noise component. Further, clocking is easily derived from the read signal zero crossings which always occur at bit cell edges.
2. Description of the Prior Art
In the prior art there are many data encoding and decoding systems. The following are systems representative of the prior art.
U.S. Pat. No. 3,689,899, to Franaszek shows two possible (d, K) codes (1, 8) and (2, 7). The potential data codes are variable length, fixed rate state independent block codes. The coding rate of the (1, 8) code is 2/3 and its coding dictionary consists of 16 code words having lengths varying 3 to 9 bits, in multiples of three. The (2, 7) code has a coding rate of 1/2 and a dictionary consisting of seven words with lengths varying from two bits to eight bits, in multiples of two. The patent does not teach either the method or apparatus of the present invention.
An article by Franaszek entitled "Efficient Code for Digital Magnetic Recording" in the IBM Technical Disclosure Bulletin, Vol. 23, No. 9, February 1981, p. 4375 shows a bounded delay code and an article entitled "An Optimization of Modulation Codes in Digital Recording" in the IEEE Transactions on Magnetics, Vol. MEG-12, No. 6, November 1976, p. 740 shows a (1, 7) code together with a number of other codes. However, the codes produced and the apparatus embodying such codes are substantially different from the codes and apparatus according to the present invention.
An article entitled "Zero modulation in Magnetic Recording" by Patel published in the IBM Journal of Research and Development July 1975 pages 366 to 378 describes a charge transition rule for obtaining a DC null in the coded data. This constraint arises because of a rotating magnetic head that is AC coupled and hence can not transfer DC.
An article by Kobayashi et al entitled "Application of Partial Response Channel Coding to Magnetic Recording Systems" in the IBM Journal of Research and Development July 1970 at page 368 to 375 suggested the previously mentioned use of a 1-D.sup.2 or Class IV Partial Response Channel in magnetic recording. However, the article does not show the use of a 1+D channel for recovering timing information in conjunction with a 1-D.sup.2 channel to recover data.
The prior art discussed above does not teach nor suggest the present invention as disclosed and claimed herein.